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Akshay Brid

Over 11 years of experience in post-silicon platform-level validation. Proven expertise in silicon bring-up, debugging, and system-level validation.... | Folsom, California, United States

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Akshay Brid’s Emails [email protected]

Akshay Brid’s Phone Numbers No phone number available.

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Akshay Brid’s Location Folsom, California, United States

Akshay Brid’s Expertise Over 11 years of experience in post-silicon platform-level validation. Proven expertise in silicon bring-up, debugging, and system-level validation. In-depth knowledge of x86 architecture and platform-level debug and integration. Strong background in low power management, including sleep, hibernate, reset, and connected modern standby states.

Akshay Brid’s Current Industry Nvidia

Akshay Brid’s Prior Industry
Polytechnic Institute Of New York University | Verifast Technologies | Intel | Amd | Nvidia

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Work Experience

Nvidia

Sr. System Integration Engineer

Mon Jul 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Amd

System Design Engineer

Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Intel Arc Add-In-Card Customer Engineering HW Lead

Tue Jun 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

System Validation Engineer - Functional Power Management Lead

Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Validation Engineer - Power Management (Functional and Stability)

Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Validation Engineer - Intel Precise Touch Technology

Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Validation Engineer - BIOS

Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Aug 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Verifast Technologies

Trainee

Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Polytechnic Institute Of New York University

Graduate Assistant

Sun Apr 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Polytechnic Institute Of New York University

Graduate Student

Mon Aug 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

Languages

Akshay Brid Email Addresses

[email protected] Email

Akshay Brid Phone Number

No phone number available. Phone number

FAQ About Akshay Brid

Akshay Brid is located at
Folsom, California, United States

Akshay Brid is a
Over 11 years of experience in post-silicon platform-level validation. Proven expertise in silicon bring-up, debugging, and system-level validation. In-depth knowledge of x86 architecture and platform-level debug and integration. Strong background in low power management, including sleep, hibernate, reset, and connected modern standby states. Nvidia

Akshay Brid currently works in the
Nvidia

Akshay Brid specializes in
Over 11 years of experience in post-silicon platform-level validation. Proven expertise in silicon bring-up, debugging, and system-level validation. In-depth knowledge of x86 architecture and platform-level debug and integration. Strong background in low power management, including sleep, hibernate, reset, and connected modern standby states.

Akshay Brid speaks the following languages:
No languages available.

Akshay Brid has prior experience in the following industries:
Amd , Intel , Intel , Intel , Intel , Intel , Verifast Technologies , Polytechnic Institute Of New York University , Polytechnic Institute Of New York University

Akshay Brid has the following professional experience:
Nvidia , Amd , Intel , Intel , Intel , Intel , Intel , Verifast Technologies , Polytechnic Institute Of New York University , Polytechnic Institute Of New York University .