
Bhavit Kaushik
Passinate Timing Signoff Engineer with a decade experience in subsystem and partition timing closure & methodology, timing signoff... | Bengaluru, Karnataka, India
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Bhavit Kaushik’s Emails bk****@qu****.com
Bhavit Kaushik’s Phone Numbers No phone number available.
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Bhavit Kaushik’s Location Bengaluru, Karnataka, India
Bhavit Kaushik’s Expertise Passinate Timing Signoff Engineer with a decade experience in subsystem and partition timing closure & methodology, timing signoff criteria, constraints developments, validation & signoff, time-budgeting, ACIO protocols & specs, timing ECOs/what-if-analysis for numerous product in Qualcomm and Intel. .... I am defined by my curiosity and thirst for learning. I buy more books than I can finish. I sign up for more online courses than I can complete. I fundamentally believe that if you stop learning new things, you stop doing great and useful things. -> Satya Nadella
Bhavit Kaushik’s Current Industry Intel
Bhavit
Kaushik’s Prior Industry
Tata Consultancy Services
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Csir Ceeri
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Rv Vlsi Design Center
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Tata Elxsi
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Qualcomm
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Intel
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Work Experience

Intel
Senior Soc Design engineer
Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Qualcomm
Senior Engineer
Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Tata Elxsi
Physical Design Engineer
Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Sep 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Rv Vlsi Design Center
Physical Design Engineer Trainee
Sat Nov 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Csir Ceeri
Trainee Scientist
Mon Aug 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Aug 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Tata Consultancy Services
Assistant System Engineer
Wed Sep 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)