
Chandni Vyas
As a Senior ASIC Engineer at Nvidia, I focus on GPU bringup its Feature Validation and Debugging. As... | Bengaluru, Bengaluru, India
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Chandni Vyas’s Location Bengaluru, Bengaluru, India
Chandni Vyas’s Expertise As a Senior ASIC Engineer at Nvidia, I focus on GPU bringup its Feature Validation and Debugging. As a Silicon Validation Engineer at Intel Corporation, I am passionate about empowering the future of computing by paving the way for the next-generation Intel Xeon SoC boot-up. I have been delving deep into end-to-end SoC reset innovation since July 2020, working on server architectures, board bring-up, system design, DFX, silicon security flows, reset FSMs, power sequences, and survivability flows across Intel projects in client, server, and graphics domains. I have a Master of Technology degree in Embedded Systems from Nirma University, where I gained proficiency in Object-Oriented Programming (OOP), Python, and C. I also have hands-on experience in silicon validation methodologies, including simulation, emulation, and FPGAs. I am an expert in silicon debugging and firmware debugging, skilled in predicting RTL/Design gaps, and experienced in developing debug tools for Intel server projects, ensuring successful day-zero bring-up. I am motivated by automating silicon validation and debug flows to enhance quality, data, and debug throughputs. Reminder - Please take care of your mental health while you scroll through endless profiles. 😌
Chandni Vyas’s Current Industry Nvidia
Chandni
Vyas’s Prior Industry
Intel
|
Nvidia
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Work Experience

Nvidia
Senior ASIC Engineer
Wed May 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Silicon Validation Engineer
Wed Jul 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jun 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Firmware Integration and Debug Engineer
Thu Jun 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)