Clover Wu

Clover Wu

-Experience with TSMC 28nm, 7nm, 5nm and 3nm process -Knowledge in analog layout methodologies, such as matching, common centroid,... | San Francisco, California, United States

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Work Experience

Tsmc

Sr. IC Layout Engineer

Wed Sep 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Western Digital

IC Mask Layout Engineer

Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Aug 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Safeco Insurance

Personal & Commercial Line Producer

Sat Mar 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Weintek Hmi

Sales Planner

Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Feb 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Lvmh

LV Store Operation/Manager Inern

Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

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