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Daniel Mcfarlin

Specialties: Formal HW/SW Co-Design and Co-Optimization for emerging platforms Automatic Code Generation and Optimization for Wide-Vector SIMD Architectures. Microarchitectural and... | San Francisco Bay Area, San Francisco Bay Area, United States

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Daniel Mcfarlin’s Emails dm****@nv****.com

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Daniel Mcfarlin’s Location San Francisco Bay Area, San Francisco Bay Area, United States

Daniel Mcfarlin’s Expertise Specialties: Formal HW/SW Co-Design and Co-Optimization for emerging platforms Automatic Code Generation and Optimization for Wide-Vector SIMD Architectures. Microarchitectural and code generator optimizations for power/performance High Performance Synthetic Aperture Radar (SAR) Image Formation Algorithm design and implementation. High Performance Stream Computing on commodity x86 Multicores. Speculative parallelization of I/O-bound applications on commodity x86 multicores. Architectural Support for Compiler Optimizations

Daniel Mcfarlin’s Current Industry Nvidia

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Work Experience

Nvidia

HW/SW Co-Designer

Wed Jul 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Apple

Hardware Engineer Intern

Sat Jun 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Software Engineer Intern

Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

University Of Illinois

Visiting Scholar

Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Software Engineer Intern

Tue Jun 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Aug 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)

Carnegie Mellon University

Research Assistant/PhD Candidate

Wed Aug 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

Indiana University

Research Assistant

Thu Sep 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Aug 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)

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Languages

Daniel Mcfarlin Email Addresses

dm****@nv****.com Work Email

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FAQ About Daniel Mcfarlin

Daniel Mcfarlin is located at
San Francisco Bay Area, San Francisco Bay Area, United States

Daniel Mcfarlin is a
Specialties: Formal HW/SW Co-Design and Co-Optimization for emerging platforms Automatic Code Generation and Optimization for Wide-Vector SIMD Architectures. Microarchitectural and code generator optimizations for power/performance High Performance Synthetic Aperture Radar (SAR) Image Formation Algorithm design and implementation. High Performance Stream Computing on commodity x86 Multicores. Speculative parallelization of I/O-bound applications on commodity x86 multicores. Architectural Support for Compiler Optimizations Nvidia

Daniel Mcfarlin currently works in the
Nvidia

Daniel Mcfarlin specializes in
Specialties: Formal HW/SW Co-Design and Co-Optimization for emerging platforms Automatic Code Generation and Optimization for Wide-Vector SIMD Architectures. Microarchitectural and code generator optimizations for power/performance High Performance Synthetic Aperture Radar (SAR) Image Formation Algorithm design and implementation. High Performance Stream Computing on commodity x86 Multicores. Speculative parallelization of I/O-bound applications on commodity x86 multicores. Architectural Support for Compiler Optimizations

Daniel Mcfarlin speaks the following languages:
No languages available.

Daniel Mcfarlin has prior experience in the following industries:
Apple , Intel , University Of Illinois , Intel , Carnegie Mellon University , Indiana University

Daniel Mcfarlin has the following professional experience:
Nvidia , Apple , Intel , University Of Illinois , Intel , Carnegie Mellon University , Indiana University .