
Debolina Roy
Physical design engineer with 3+ years of experience in 10nm and 7 nm process nodes.Strength includes pnr flows... | Kolkata, Kolkata, India
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Debolina Roy’s Location Kolkata, Kolkata, India
Debolina Roy’s Expertise Physical design engineer with 3+ years of experience in 10nm and 7 nm process nodes.Strength includes pnr flows along with sign off flow knowledge. Tool knowledge: Fusion compiler, primetime, redhawk, caliber, vclp, primepower, starrc, Lvs.
Debolina Roy’s Current Industry Intel
Debolina
Roy’s Prior Industry
Vellore Institute Of Technology
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Intel
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Work Experience

Intel
SoC Design Engineer
Tue Jun 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intel
Soc Design Intern
Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat May 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Vellore Institute Of Technology
Student
Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)