Desalegne Teweldebrhan

Desalegne Teweldebrhan

Experienced Technology Development Engineer with a demonstrated history of active technical developments in the semiconductors industry. Skilled in... | Los Angeles Metropolitan Area, Los Angeles Metropolitan Area, United States

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Work Experience

Intel

Sr. PTD Engineer - Process Integration Development

Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Intel

Staff TD Engineer Logic TD

Wed Apr 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Sr. Process TD Engineer

Fri Jul 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Apr 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Materials Research Society

MSR Student Research Fellow

Wed Dec 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Apr 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

University Of California Riverside

PhD Graduate Researcher

Sat Sep 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

Semiconductor Research

Researcher for FENA

Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Apr 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

University Of California Riverside

Research Assistant

Sat Jan 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)

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