
Dheeraj Nag Narasimhababu Sridevi
I’m seeking full-time opportunities in Mixed-Signal IC Design. I have developed strong knowledge in MOS device physics, Analog... | Folsom, California, United States
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Dheeraj Nag Narasimhababu Sridevi’s Emails dn****@in****.com
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Dheeraj Nag Narasimhababu Sridevi’s Location Folsom, California, United States
Dheeraj Nag Narasimhababu Sridevi’s Expertise I’m seeking full-time opportunities in Mixed-Signal IC Design. I have developed strong knowledge in MOS device physics, Analog IC design topics like OTAs, Class AB amplifiers, β-Multiplier, LDO, basic designs of ADC’s, and Digital IC design topics like FFs, Latch, SRAMs, Static Timing Analysis, and many more during my masters at Arizona State University. Along with that, I have two years of relevant experience in the design & verification of mixed-signal circuits at Intel NDTM US LLC.
Dheeraj Nag Narasimhababu Sridevi’s Current Industry Intel
Dheeraj
Nag Narasimhababu Sridevi’s Prior Industry
Tata Consultancy Services
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Arizona State University
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Intel
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Work Experience

Intel
3D NAND Pre-Silicon Validation Engineer
Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Arizona State University
Grad Assistant
Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Tata Consultancy Services
Design Engineer
Sat Oct 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)