
Gary Tsai
• Thermal manager proficient in simulations, design, and comprehensive understanding of thermal solution mass production challenges.... | Taiwan
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Gary Tsai’s Location Taiwan
Gary Tsai’s Expertise • Thermal manager proficient in simulations, design, and comprehensive understanding of thermal solution mass production challenges. • 14 years of system & component thermal design and validation. • Demonstrated experience in conducting, managing and documenting full-scale collaborative and project life cycles. • Familiar with Dell, Fujitsu and Intel CRS validation and thermal design. • Lead thermal solution development for rack server, workstation, and storage product. • Project highlights: Dell ESI 4U DCS8440 V100 GPU server. PowerEdge R210 II 1U server and T110 II workstation. Intel server system R2300L/R2200L family 2U rack, Intel server system R2300GZ family 2U rack. Lenovo Scorpio 2.0 42U and 46U rack server, IBM X86 Server System x3755 M3. Fujitsu X86 Primergy RX100S7, RX2530, RX2540, RX4770 and CX400 server.
Gary Tsai’s Current Industry 聯想
Gary
Tsai’s Prior Industry
Intel
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Mitac
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Inventec
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Mitac Computing Technology
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Inspur
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聯想
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Work Experience

聯想
Thermal Advisory Engineer
Fri Jan 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Inspur
System Thermal Engineer
Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Mitac Computing Technology
Thermal and Acoustic Manager
Thu Dec 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Mitac Computing Technology
Senior Thermal Engineer
Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Dec 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Inventec
Senior Thermal Engineer
Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Mitac
Senior Thermal Engineer
Tue Dec 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Validation Engineer
Sat Dec 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Nov 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)