Hariharan Nagarajan

Hariharan Nagarajan

RFIC or SERDES or PLL or Analog IC Design Engineer, Experience in IC Design, Tapeout, Verification, FIB and... | San Jose, California, United States

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Work Experience

Amd

GPU GDDR SERDES PHY SMTS Designer

Mon Apr 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Nxp Semiconductors

WiFi RFIC Sr. Staff Design Engineer (Laid Off)

Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Feb 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)

Samsung Electronics

5G mmWave/RFIC Staff Design Engineer

Mon Jan 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)

Texas Instruments

High Speed Serial Link, Senior Design Engineer

Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Qualcomm

RFIC Design Engineer

Tue Jan 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

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