Iteeshree Srivastava

Iteeshree Srivastava

In my 8 years of experience in VLSI Industry as Physical design Engineer successfully led various customer... | Bengaluru, Bengaluru, India

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Work Experience

Intel

Physical Design Engineer

Fri Oct 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Cadence Design Systems

Sae

Sun Apr 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Oct 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)

Infosys

Physical Design Engineer

Tue Mar 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Motilal Nehru National Institute Of Technology

Research Intern

Sat Jun 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu May 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Physical Design Engineer

— Present

Skills

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