
Jeremy Graf
Senior Hardware Design Engineer with experience in FPGA RTL design, test and verification as well as PCB design,... | 7340 Little Timber GroveApartment 102, Colorado Springs, United States
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Jeremy Graf’s Emails je****@hp****.com
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Jeremy Graf’s Location 7340 Little Timber GroveApartment 102, Colorado Springs, United States
Jeremy Graf’s Expertise Senior Hardware Design Engineer with experience in FPGA RTL design, test and verification as well as PCB design, schematic capture, layout, and testing for DC-DC power regulators, NICs, PCIe switches, and CPUs. Also has experience with leading projects, working with ODMs and JDMs, and training new engineers.
Jeremy Graf’s Current Industry Hewlett Packard Enterprise
Jeremy
Graf’s Prior Industry
Hewlett Packard Enterprise
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Work Experience

Hewlett Packard Enterprise
Senior Electrical Design Engineer
Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Present