
Jingwei Xu
With over 7 years of experience in design verification, I am passionate about creating innovative and reliable solutions... | 3167 Payne AvenueApartment 48, San Jose, United States
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Jingwei Xu’s Emails ji****@ap****.com
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Jingwei Xu’s Location 3167 Payne AvenueApartment 48, San Jose, United States
Jingwei Xu’s Expertise With over 7 years of experience in design verification, I am passionate about creating innovative and reliable solutions for verification plan for complex digital systems. My mission is to ensure the highest quality and performance of Apple's products, using my expertise in UVM, SystemVerilog. I am proud to be part of a diverse and collaborative team at Apple, where I can contribute to the company's vision and values, and learn from the best in the industry. As a staff design verification engineer at Apple, I work closely with the design and architecture teams to verify the memory coherency and bandwidth of our chips. I lead the development and improvement of the verification infrastructure, including stimuli, modeling, and coverage. I also run regressions and report metrics for bug tracking and resolution. I use my skills in UVM, computer architecture to implement and test verification plans to hunter bugs, and to correlate the RTL performance with the C models. Additionally, I have published multiple papers on low-power and high-performance solutions for wireless systems and compressive sensing, and I am fluent in Chinese and English.
Jingwei Xu’s Current Industry Apple
Jingwei
Xu’s Prior Industry
Ibm
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Texas A And M University
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Samsung Electronics America
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Apple
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Work Experience

Apple
Staff Design Verification Engineer
Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Apple
Senior Design Verification Engineer
Fri Mar 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Sep 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Apple
Design Verification Engineer
Fri Jul 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Mar 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Samsung Electronics America
Hardware Design Intern
Fri Feb 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Texas A And M University
Research Assistant
Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Ibm
Software Engineering Intern
Wed Sep 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)