Jonathan Lee

Jonathan Lee

Digital design engineer with experience in FPGA design, PCB design, embedded software, system level architecture, and hardware verification... | Dublin, Ohio, United States

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Work Experience

Sandia National Laboratories

Principal Electrical Engineer

Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Sandia National Laboratories

Electrical Engineer

Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

National Instruments

Senior Digital Hardware Engineer

Sat Sep 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Chipset Satellite Compatibility Validation Intern

Sat Apr 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)

Anheuser Busch

Information Systems Intern

Mon Sep 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Apr 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time)

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