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Kavin Rajendran

Extensive hardware functional verification experience across x86 and ARM architectures. Adept at verification methodology development, driving improvements in... | Santa Clara, California, United States

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Kavin Rajendran’s Location Santa Clara, California, United States

Kavin Rajendran’s Expertise Extensive hardware functional verification experience across x86 and ARM architectures. Adept at verification methodology development, driving improvements in verification efficiency and design quality via upgrades to verification techniques. Skilled in all aspects of UVM-based test bench development. Highlights: 1. Developed UVM stimulus libraries for both coherent and non-coherent protocols. 2. Collaborated on the development of a caching agent Bus Functional Model. 3. Verified Audio Codec IP modules and RF Front End (RFFE) chips. 4. Designed, developed, and verified critical FPGA modules for LTE eNodeB Base Transceiver Stations. 5. Proficient in scripting with PERL and Python. Specialities: 1. Functional Verification: VIP development, IP Verification, Functional Coverage, Regressions, Assertions, UVM, SV. 2. Digital Design: Micro-architecture, RTL Design, Multi Clock Design, Module Integration, Synthesis. 3. Authoring Design documents, User Guides, Project directory organisation, Team activity tracking.

Kavin Rajendran’s Current Industry Intel

Kavin Rajendran’s Prior Industry
Wipro Technologies | Inphi | Qualcomm | Intel

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Work Experience

Intel

IP Design Verification Engineer

Fri Jun 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Qualcomm

Digital Verification Engineer

Fri Sep 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Inphi

Physical Design Engineer - Consultant

Sat Apr 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Wipro Technologies

Project Engineer

Wed Jun 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

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Kavin Rajendran Email Addresses

[email protected] Email

Kavin Rajendran Phone Number

No phone number available. Phone number

FAQ About Kavin Rajendran

Kavin Rajendran is located at
Santa Clara, California, United States

Kavin Rajendran is a
Extensive hardware functional verification experience across x86 and ARM architectures. Adept at verification methodology development, driving improvements in verification efficiency and design quality via upgrades to verification techniques. Skilled in all aspects of UVM-based test bench development. Highlights: 1. Developed UVM stimulus libraries for both coherent and non-coherent protocols. 2. Collaborated on the development of a caching agent Bus Functional Model. 3. Verified Audio Codec IP modules and RF Front End (RFFE) chips. 4. Designed, developed, and verified critical FPGA modules for LTE eNodeB Base Transceiver Stations. 5. Proficient in scripting with PERL and Python. Specialities: 1. Functional Verification: VIP development, IP Verification, Functional Coverage, Regressions, Assertions, UVM, SV. 2. Digital Design: Micro-architecture, RTL Design, Multi Clock Design, Module Integration, Synthesis. 3. Authoring Design documents, User Guides, Project directory organisation, Team activity tracking. Intel

Kavin Rajendran currently works in the
Intel

Kavin Rajendran specializes in
Extensive hardware functional verification experience across x86 and ARM architectures. Adept at verification methodology development, driving improvements in verification efficiency and design quality via upgrades to verification techniques. Skilled in all aspects of UVM-based test bench development. Highlights: 1. Developed UVM stimulus libraries for both coherent and non-coherent protocols. 2. Collaborated on the development of a caching agent Bus Functional Model. 3. Verified Audio Codec IP modules and RF Front End (RFFE) chips. 4. Designed, developed, and verified critical FPGA modules for LTE eNodeB Base Transceiver Stations. 5. Proficient in scripting with PERL and Python. Specialities: 1. Functional Verification: VIP development, IP Verification, Functional Coverage, Regressions, Assertions, UVM, SV. 2. Digital Design: Micro-architecture, RTL Design, Multi Clock Design, Module Integration, Synthesis. 3. Authoring Design documents, User Guides, Project directory organisation, Team activity tracking.