Laurent Charles laurent.charles@cnrs.fr & & +33 4 76 88 10 00 | My area of work is the design of data acquisition systems (DAQ) and control command systems (CC) for Particle Physics (LHC/CMS/CERN) and Nuclear Physics using high-speed digital electronics and new generation of programmable components (FPGA). I have an extensive knowledge of FPGA design in VHDL (coding, simulation, implementation, verification, system integration, commissioning and production). I am familiar with the hardware design (choice of components, schematic) and with the software development (definition of the registers map, scripts writing). I have a strong background in the implementation of several functionalities into the FPGA essentially from XILINX: * Clock management (DCM, MMCM, specific buffers) * High-speed serial I/O links (1 and 10 Gigabit Ethernet, AURORA 8b10b, AURORA 64b66b, PCIe, GBT, USB2, etc.) * High-speed optical links (SFP and SFP+ transceivers) * Memory interfaces (DDR3 & DDR4 via MIG, microSD) * Fast ADC / DAC peripherals interface -> High Speed LVDS lines: SERDES, phase & data alignment (DELAY+BITSLIP). -> JESD204B interface * Digital Signal Processing (DSP) algorithms (filters, etc.) * Slow control protocols (SPI, I2C, UART, IPBUS, Token Ring) * System-on-Chip (SoC) Zynq-7000 Co-Design (Progammable Logic PL + ARM Processor System PS) I know several FPGA families from XILINX vendor * Ultrascale-series (Kintex-U) * 7-series devices(Kintex-7, Virtex-7) * 6-series devices (Virtex6, Spartan-6) * Zynq devices * And older series (Virtex-5, Virtex-4, Virtex-2Pro) I use several synthesis and simulation tools from Xilinx and third-party * ISE, VIVADO, EDK, SDK, MODELSIM, etc. I have a good knowledge of external digital components needed in board-level: * PLL or jitter cleaner * I2C switches and mux * SFP transceivers * PHY device dedicated to Ethernet (GMII, SGMII, etc.) I am familiar with some standards extending the capabilities in system-level: * Micro-TCA technology (crate, MCH, AMC boards) * FMC standard

Laurent Charles

My area of work is the design of data acquisition systems (DAQ) and control command systems (CC) for...

Greater Strasbourg Metropolitan Area, Greater Strasbourg Metropolitan Area, France

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Laurent Charles’s Location Greater Strasbourg Metropolitan Area, Greater Strasbourg Metropolitan Area, France

Laurent Charles’s Expertise My area of work is the design of data acquisition systems (DAQ) and control command systems (CC) for Particle Physics (LHC/CMS/CERN) and Nuclear Physics using high-speed digital electronics and new generation of programmable components (FPGA). I have an extensive knowledge of FPGA design in VHDL (coding, simulation, implementation, verification, system integration, commissioning and production). I am familiar with the hardware design (choice of components, schematic) and with the software development (definition of the registers map, scripts writing). I have a strong background in the implementation of several functionalities into the FPGA essentially from XILINX: * Clock management (DCM, MMCM, specific buffers) * High-speed serial I/O links (1 and 10 Gigabit Ethernet, AURORA 8b10b, AURORA 64b66b, PCIe, GBT, USB2, etc.) * High-speed optical links (SFP and SFP+ transceivers) * Memory interfaces (DDR3 & DDR4 via MIG, microSD) * Fast ADC / DAC peripherals interface -> High Speed LVDS lines: SERDES, phase & data alignment (DELAY+BITSLIP). -> JESD204B interface * Digital Signal Processing (DSP) algorithms (filters, etc.) * Slow control protocols (SPI, I2C, UART, IPBUS, Token Ring) * System-on-Chip (SoC) Zynq-7000 Co-Design (Progammable Logic PL + ARM Processor System PS) I know several FPGA families from XILINX vendor * Ultrascale-series (Kintex-U) * 7-series devices(Kintex-7, Virtex-7) * 6-series devices (Virtex6, Spartan-6) * Zynq devices * And older series (Virtex-5, Virtex-4, Virtex-2Pro) I use several synthesis and simulation tools from Xilinx and third-party * ISE, VIVADO, EDK, SDK, MODELSIM, etc. I have a good knowledge of external digital components needed in board-level: * PLL or jitter cleaner * I2C switches and mux * SFP transceivers * PHY device dedicated to Ethernet (GMII, SGMII, etc.) I am familiar with some standards extending the capabilities in system-level: * Micro-TCA technology (crate, MCH, AMC boards) * FMC standard

Laurent Charles’s Current Industry Expleo

Laurent Charles’s Prior Industry
Universite De Lorraine | Dolphin Integration | Cnrs Centre National De La Recherche Scientifique | Expleo

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