
Laurent Dulau
Lead and Design Analog ICs including power devices (monolitic or dual die in same package), Expert in Automotive... | Blagnac, Blagnac, France
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Laurent Dulau’s Location Blagnac, Blagnac, France
Laurent Dulau’s Expertise Lead and Design Analog ICs including power devices (monolitic or dual die in same package), Expert in Automotive applications (Power SBC, POWER STEERING /EPS/SENSORS/ADAS, Alternator regulator, ABS / ESP/ESC, CORNER LIGHT, AIRBAG, Telematics power SBC, etc...) Power Management, PDP Driver, IGBT gate driver, LDO, DC-DC converter with ASIL level, charge pump and etc..., Design for ESD gun at IC level, EMC expert, BCD, CMOS or Vertical technologies, ISO26262... From August 2000 to 2002, I worked on H bridge drivers, charge pump, Linear regulator, Amplifier, Vref, comparators and I designed Primary Pwm controller Ics for Delta (Computer market). This type of circuits incorporates all circuitry to implement off line or DC-DC power supply applications using a fixed frequency current mode control. The standard version of this circuit is TSM007. Then I designed the standard and well known ST TD350, TD351 and TD352 IGBT Gate drivers 10 years ago. The two levels driver (FR 0306344 patent, May 2003 and US 6940319B2 patent) used in TD350 or TD351 was presented in PCIM 2005 in Nuremberg and in the paper: A New Gate Driver Integrated Circuit for IGBT Devices with Advanced Protections, journal IEEE Trans. on Power Electronics vol. 21, no. 1, pp 38-44, January 2006. After, I designed PDP drivers Ics with new features presented in CES 2006 in Las Vegas and in SID journal. http://dev.informationdisplay.org/IDArchive/2006/September/ImprovedPerformancefromDisplayDriversEnableS.aspx In 2007, I designed a new topology of High-side driver with two slopes to control di/dt and dv/dt for the automotive alternator rotor. I improved the BCI in automotive alternator regulator High-side driver by the end of 2009. This work was published by my Freescale colleagues ( K. Abouda and all) after I have left Freescale: Design for high EMC immunity of an alternator voltage regulator integrated circuit IEEE APEMC 2012 Asia-Pacific Symposium, 21-24 May 2012, Singapore. Many Thanks to F. Lafont from Valeo Creteil for his collaboration. In 2009, I designed a Sigmoid High-side driver for the 10XS3535 Smart Front Corner Light IC including Triple 10mOhm and Dual 35mOhm power mosfet switches. The purpose of the shape was to guarantee lower spectrum emission. In 2011, I led and designed a Buck converter with IMS Fraunhofer Institute (Duisburg) for Altis semiconductor (Corbeil Essonnes).
Laurent Dulau’s Current Industry Infineon Technologies
Laurent
Dulau’s Prior Industry
Adera
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Ims Cnrs Umr 5218 University Of Bordeaux
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Enseirb Matmeca
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Psi Electronics
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Stmicroelectronics
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Freescale Semiconductor
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Altis Semiconductor
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Arcys Formerly Elta
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Toshiba Electronics Europe
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Infineon Technologies
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Work Experience

Infineon Technologies
Concept and ICs Design, Analog and Power for Automotive Applications
Mon Oct 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Toshiba Electronics Europe
Technical Leader Automotive Business Unit
Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Sep 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Arcys Formerly Elta
Senior Analog Hardware Design Engineer for Harsh Environments
Thu Nov 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Nov 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Altis Semiconductor
Principal Analog IC design Engineer, Smart Power ICs and Powermanagement Expert
Thu Apr 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Oct 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Freescale Semiconductor
Senior Analog Designer for Automotive applications
Wed Nov 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Mar 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Stmicroelectronics
Senior Analog Designer & Project Leader - Powermanagement and PDP Driver ICs
Tue Aug 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Oct 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)
Psi Electronics
ST7 Design Engineer (STMICROELECTRONICS ROUSSET)
Thu Jul 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)
Enseirb Matmeca
Researcher and lecturer (ATER)
Mon Sep 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 1999 00:00:00 GMT+0000 (Coordinated Universal Time)
Ims Cnrs Umr 5218 University Of Bordeaux
R&D Design Engineer
Sun Sep 01 1996 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Aug 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time)
Adera
ASIC Design Engineer - JESSICA Engineer
Thu Sep 01 1994 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 1996 00:00:00 GMT+0000 (Coordinated Universal Time)