
Lejun Wang
- 20+ years of experience in electronic packaging industry in NPI, Design for Manufacturability and Reliability (DFX), technology... | Wilmington, Massachusetts, United States
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Lejun Wang’s Emails lw****@al****.com
Lejun Wang’s Phone Numbers No phone number available.
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Lejun Wang’s Location Wilmington, Massachusetts, United States
Lejun Wang’s Expertise - 20+ years of experience in electronic packaging industry in NPI, Design for Manufacturability and Reliability (DFX), technology development, process characterization/qualification, statistical data analysis, structured problem solving, FMEA, PFA, CPI, DOE, SPC, and lean sigma manufacturing for mobile products and high reliability electronic modules in medical devices and CPU products. - 3 years of experience leading packaging NPI activities for Analog Devices’ MEMS and RF SiP products. - 7 years of experience leading packaging NPI activities for Qualcomm’s industry-leading cellular modem products, and continuously driving these products to thinner/smaller packages, by closely managing top assembly houses in planning and execution of Package Characterization and Qualification activities. - Extensive knowledge in electronic packaging processes including wafer bumping, die prep, flip chip attach, plasma, wire bond, molding, ball attach, SMT, and packaging materials including molding compound, underfill, flux and solder paste, conductive/non-conductive die attach material, and dam & fill encapsulant.
Lejun Wang’s Current Industry Allegro Microsystems
Lejun
Wang’s Prior Industry
Intel
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Medtronic
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Qualcomm
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Analog Devices
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Allegro Microsystems
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Work Experience

Allegro Microsystems
Sr. Principal Packaging Engineer
Wed Feb 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Analog Devices
Semiconductor Packaging Engineer
Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Qualcomm
Sr. Staff Engineer
Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Medtronic
Sr. Principal Packaging Engineer
Tue Feb 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Medtronic
Principal Process Engineer
Wed Oct 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Senior Engineer
Tue May 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Oct 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time)