Ler Lee lerlee@intel.com & | Motivated RF engineer/researcher with years of experience in CMOS RF/analog circuit designs and modeling. Expert and hands on experience in RF/analog circuit analysis, simulation and layout, on-wafer high frequency characterization, inductor modeling and numerical mathematical programming.

Ler Lee

Motivated RF engineer/researcher with years of experience in CMOS RF/analog circuit designs and modeling. Expert and hands on experience...

Gelugor, Gelugor, Malaysia

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Ler Lee’s Emails [email protected]

Ler Lee’s Phone Numbers No phone number available.

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Ler Lee’s Location Gelugor, Gelugor, Malaysia

Ler Lee’s Expertise Motivated RF engineer/researcher with years of experience in CMOS RF/analog circuit designs and modeling. Expert and hands on experience in RF/analog circuit analysis, simulation and layout, on-wafer high frequency characterization, inductor modeling and numerical mathematical programming.

Ler Lee’s Current Industry Intel

Ler Lee’s Prior Industry
Silterra | Altera | Intel | Globalfoundries

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Work Experience

Intel

Analog Circuit Designer

Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Globalfoundries

Member Of Technical Staff

Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Analog Circuit Designer

Sun Mar 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Mar 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)

Altera

Device Engineer, Member Of Technical Staff

Mon Nov 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Feb 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Silterra

Senior Engineer

Thu Dec 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Nov 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

Languages

FAQ About Ler Lee

Ler Lee is located at
Gelugor, Gelugor, Malaysia

Ler Lee is a
Motivated RF engineer/researcher with years of experience in CMOS RF/analog circuit designs and modeling. Expert and hands on experience in RF/analog circuit analysis, simulation and layout, on-wafer high frequency characterization, inductor modeling and numerical mathematical programming. Intel

Ler Lee currently works in the
Intel

Ler Lee specializes in
Motivated RF engineer/researcher with years of experience in CMOS RF/analog circuit designs and modeling. Expert and hands on experience in RF/analog circuit analysis, simulation and layout, on-wafer high frequency characterization, inductor modeling and numerical mathematical programming.