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Michael Liao

Have detailed knowledge of the FPGA architecture and a high-level of competency working with Vivado and Verilog. Manage... | San Francisco Bay Area, San Francisco Bay Area, United States

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Michael Liao’s Location San Francisco Bay Area, San Francisco Bay Area, United States

Michael Liao’s Expertise Have detailed knowledge of the FPGA architecture and a high-level of competency working with Vivado and Verilog. Manage a small team of engineers working closely with design COEs and speed timing group on FPGA clock network, as well as international teams, sizes ranging from 2 to 10. Efficient communication and collaboration are strengths utilized daily in a team environment.

Michael Liao’s Current Industry Xilinx

Michael Liao’s Prior Industry
Xilinx

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Work Experience

Xilinx

Engineering Manager

Mon Aug 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

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Michael Liao Email Addresses

[email protected] Email

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FAQ About Michael Liao

Michael Liao is located at
San Francisco Bay Area, San Francisco Bay Area, United States

Michael Liao is a
Have detailed knowledge of the FPGA architecture and a high-level of competency working with Vivado and Verilog. Manage a small team of engineers working closely with design COEs and speed timing group on FPGA clock network, as well as international teams, sizes ranging from 2 to 10. Efficient communication and collaboration are strengths utilized daily in a team environment. Xilinx

Michael Liao currently works in the
Xilinx

Michael Liao specializes in
Have detailed knowledge of the FPGA architecture and a high-level of competency working with Vivado and Verilog. Manage a small team of engineers working closely with design COEs and speed timing group on FPGA clock network, as well as international teams, sizes ranging from 2 to 10. Efficient communication and collaboration are strengths utilized daily in a team environment.