
Michael Wright
• Analog integrated circuit (IC)(chip) design, thick film hybrids, systems, printed circuit boards • Analog circuit designer, where everything not Verilog... | Redmond, Washington, United States
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Michael Wright’s Emails mi****@in****.com
Michael Wright’s Phone Numbers No phone number available.
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Michael Wright’s Location Redmond, Washington, United States
Michael Wright’s Expertise • Analog integrated circuit (IC)(chip) design, thick film hybrids, systems, printed circuit boards • Analog circuit designer, where everything not Verilog register transfer logic is analog • High speed data com, FINFET, PCIe, UCIe, 10Gbit per second serializer-deserializer (SerDes) • Power: switch-mode power supplies (SMPS), high power, high Voltage, high current >1500 VA • Consumer, medical, industrial, scientific instruments, military, aeronautics, aerospace • Analog: low-noise, high-speed, precision, RF, devices, band-gap Voltage references • Signal integrity, grounding & bonding, shielding, transmission lines, Faraday shielding • Power conversion: AC to DC, DC to DC buck, resonant, flyback, forward, boost, buck-boost... • Magnetics, coupled inductors, transformers • Consumer and automotive LIDAR • RFID, RF IC, RF, radio, wide area networking, local area networking, up to 35 G bits per second • Sensors, imagers, silicon photo-multipliers, multi-pixel photon counters • Electron devices, tunneling, dielectric, charge storage, phonon sensors, stress and strain sensors • Flash memory design, non-volatile memory device design, electrically erasable memory
Michael Wright’s Current Industry Forwardedge Asic
Michael
Wright’s Prior Industry
Lawrence Berkeley National Laboratory
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Anachip Sole Proprietorship
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Arithmos
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Tdk Semiconductor
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Tritech A Division Of Chartered Semiconductor
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Intel Nserial
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Iwatt
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Vishay Siliconix
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Infineon Technologies
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Sinewatts
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Pacific Northwest National Laboratory Pnnl
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Impinj
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Microvision
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Intuitive
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Forwardedge Asic
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Work Experience

Forwardedge Asic
Analog Design Engineer, Senior
Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Intuitive
Medical Surgical Robot Electronics Design Engineer
Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Mar 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)
Microvision
Automotive LiDAR Product Development Engineer
Wed Nov 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Impinj
Principal Engineer RFID RFIC
Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Pacific Northwest National Laboratory Pnnl
Chief Scientist Title, Integrated Circuit, Imager, Scientific Instrument & Spectrometer Designer
Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Sinewatts
VP of Engineering, Photovoltaic Inverter Integrated Circuit Development
Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Infineon Technologies
Senior Power Engineer, New Platforms, 1 of 4 Designers of New Designs
Mon Dec 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Vishay Siliconix
New Product Line Creator, Corporate Research & Development
Sun Aug 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Nov 01 2008 00:00:00 GMT+0000 (Coordinated Universal Time)
Iwatt
Design Team Manager, Chief Implementor, Corporate Research & Development
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel Nserial
Senior Staff Design Engineer, Corporate Research & Development
Mon Jan 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
Tdk Semiconductor
Senior Staff Analog IC Designer, Corporate Research & Development
Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)
Tritech A Division Of Chartered Semiconductor
Design Group Manager, Corporate Research & Development
Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 1998 00:00:00 GMT+0000 (Coordinated Universal Time)
Arithmos
Senior Analog IC Designer, Corporate Research & Development
Sun Jan 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time)
Anachip Sole Proprietorship
Consultant, Sole Proprieter
Mon Jul 01 1991 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Lawrence Berkeley National Laboratory
Staff Scientist II, Experimental High Energy Sub-Atomic Particle Physics
Sun May 01 1988 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Apr 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time)