
Nick Seroff
TECHNOLOGY AND ENGINEERING LEADER Repeatedly led teams to successful, timely completion of complex development projects - Proven achievements in... | 19541 Almaden Road, San Jose, United States
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Nick Seroff’s Location 19541 Almaden Road, San Jose, United States
Nick Seroff’s Expertise TECHNOLOGY AND ENGINEERING LEADER Repeatedly led teams to successful, timely completion of complex development projects - Proven achievements in the electric vehicle, consumer electronics, data storage and semiconductor industries - Extensive experience in system optimization, silicon design and software creation processes Creative, results-oriented professional who can inspire others to think outside the box and generate innovative solutions to real world problems. Extensive experience interfacing with multiple levels of customers to understand all issues within the target ecosystem and provide superior solutions. Keenly aware of industry trends and the opportunities they provide to early adopters. Successfully built relationships with corporate leaders, customers and suppliers.
Nick Seroff’s Current Industry Relyion Energy
Nick
Seroff’s Prior Industry
Exar
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National Semiconductor
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Infineon Technologies
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Quantum
|
Seagate Technology
|
Apple
|
Fairchild Semiconductor
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Nxp Semiconductors
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Western Digital
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Freewire Technologies
|
Relyion Energy
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Work Experience

Relyion Energy
Vice President of Engineering
Mon Jul 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Freewire Technologies
Vice President Of Engineering / Research
Mon Apr 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)
Western Digital
Director R&D, Office of the CTO, Enterprise SSD
Thu Jun 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Sep 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Nxp Semiconductors
System Architect
Thu Oct 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
Fairchild Semiconductor
Director of Architecture Development
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jul 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Apple
Silicon Technologist / Manager
Fri Jan 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Seagate Technology
Sr. Director VLSI Design Engineering
Thu Nov 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Quantum
Director of ASIC Engineering
Mon May 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jul 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)
Infineon Technologies
Design Center Manager
Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)
National Semiconductor
Design Manager
Sun Jan 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time)
Exar
Group Manager
Sat Jan 01 1994 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time)