
Nitheesh Augustine
• Worked on ISP (Image signal processor ) with Automotive certification for PPA targets ▪︎Worked on High band width... | Hyderabad, Telangana, India
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Nitheesh Augustine’s Location Hyderabad, Telangana, India
Nitheesh Augustine’s Expertise • Worked on ISP (Image signal processor ) with Automotive certification for PPA targets ▪︎Worked on High band width memory with 3.2 GHz, 2 GHz, as well as memory controller SoC with a speed of 450MHz and 1.1 GHz speed. • worked on UFS subsystem with unipro, mphy and LBIST. This project was automotive rule deck along with ASIL B certification become very complicated due to the LBIST logic and OCC clocking structure. ▪︎successfully taped out 9 projects which includes 10 nm technology with Intel foundry and 5nm, 6nm, 12nm & 16 nm 7.5T height technology with TSMC foundry. ▪︎Efficient in handling blocks for DDR ram IPs. successfully completed project with different technology nodes with less than 1GHz & above 1.8GHz frequency. Roles and Responsibilities : ▪︎Synthesis using Synopsys DC tool ▪︎Floorplanning , placement, CTS, Routing ▪︎Static timing analysis ▪︎physical DRC verification ▪︎SoC level power and EM analysis. Power integrity analysis and initial Power Mesh creation with respect to the early power anlaysis. ▪︎Power Grid View Library creation, Tech IR/EM views ▪︎Defining new power mesh for optimal power drop and EM issues at SoC and subsystem level ▪︎SOC Level ESD planning and implementation ▪︎custom synchronizer cell creation ▪︎Physical verification - understanding some of DRCs using DRM files ▪︎conformal ECO , CLP and LEC • Power analysis Tools Handled ▪︎Synopsys - ICC2, DC, Prime Time, spyglass ▪︎Cadence : Innovus, Tempus ,Voltus ▪︎Mentor Graphics : caliber ▪︎Cadence : conformal Equalance check ▪︎Power analysis : cadence voltus , red hawk ▪︎Good knowledge in languages relevant to the ASIC development process including Verilog and very good TCL Scripting. ▪︎Good knowledge of RTL simulation and synthesis.
Nitheesh Augustine’s Current Industry Arm
Nitheesh
Augustine’s Prior Industry
Self Employed
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Intel
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Micron Technology
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Arm
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Work Experience

Arm
Senior Physical Design Engineer
Wed Nov 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Micron Technology
Senior Physical Design Engineer
Thu Jul 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Nov 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Micron Technology
ASIC Physical Design Engineer
Fri Feb 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jun 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
ASIC Physical Design Engineer (Consultant)
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Feb 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Self Employed
Entrepreneur
Thu Oct 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)