Parth Bhogate parth.bhogate@nvidia.com & | SKILLS • Languages: C, C++, SystemVerilog, Verilog HDL • Tools: ModelSim, Cadence RTL Compiler, Synopsys Design Vision, GDB, Xilinx ISE • Hardware Platforms: Arduino, Cypress PSoC, Atmel AVR

Parth Bhogate

SKILLS • Languages: C, C++, SystemVerilog, Verilog HDL • Tools: ModelSim, Cadence RTL Compiler, Synopsys Design Vision, GDB, Xilinx ISE •...

Santa Clara, California, United States

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Parth Bhogate’s Emails [email protected]

Parth Bhogate’s Phone Numbers No phone number available.

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Parth Bhogate’s Location Santa Clara, California, United States

Parth Bhogate’s Expertise SKILLS • Languages: C, C++, SystemVerilog, Verilog HDL • Tools: ModelSim, Cadence RTL Compiler, Synopsys Design Vision, GDB, Xilinx ISE • Hardware Platforms: Arduino, Cypress PSoC, Atmel AVR

Parth Bhogate’s Current Industry Nvidia

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Work Experience

Nvidia

GPU Architect

Sun May 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Samsung Electronics

GPU Performance Architect

Sun Jul 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun May 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Qualcomm

CPU Modeling Engineer

Wed Feb 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jun 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Silicon Labs

Design Engineer Intern

Sun May 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Aug 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

Analog Devices

Applications Engineering Intern

Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Expersis Technologies

Software Engineering Intern

Thu May 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Logicare Embedded Systems

Embedded Software Intern

Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Skills

Languages

FAQ About Parth Bhogate

Parth Bhogate is located at
Santa Clara, California, United States

Parth Bhogate is a
SKILLS • Languages: C, C++, SystemVerilog, Verilog HDL • Tools: ModelSim, Cadence RTL Compiler, Synopsys Design Vision, GDB, Xilinx ISE • Hardware Platforms: Arduino, Cypress PSoC, Atmel AVR Nvidia

Parth Bhogate currently works in the
Nvidia

Parth Bhogate specializes in
SKILLS • Languages: C, C++, SystemVerilog, Verilog HDL • Tools: ModelSim, Cadence RTL Compiler, Synopsys Design Vision, GDB, Xilinx ISE • Hardware Platforms: Arduino, Cypress PSoC, Atmel AVR

Parth Bhogate speaks the following languages:
No languages available.

Parth Bhogate has prior experience in the following industries:
Samsung Electronics , Qualcomm , Silicon Labs , Analog Devices , Expersis Technologies , Logicare Embedded Systems

Parth Bhogate has the following professional experience:
Nvidia , Samsung Electronics , Qualcomm , Silicon Labs , Analog Devices , Expersis Technologies , Logicare Embedded Systems .