
Paul Jaszkowiak
Electrical Engineer with experience in PCB design and layout, signal integrity design, Verilog FPGA design, and C++ programming. | Colorado Springs, Colorado, United States
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Paul Jaszkowiak’s Emails pa****@at****.com
Paul Jaszkowiak’s Phone Numbers 1408441****
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Paul Jaszkowiak’s Location Colorado Springs, Colorado, United States
Paul Jaszkowiak’s Expertise Electrical Engineer with experience in PCB design and layout, signal integrity design, Verilog FPGA design, and C++ programming.
Paul Jaszkowiak’s Current Industry Atmel
Paul
Jaszkowiak’s Prior Industry
Center For Secure And Dependable Systems
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Agilent Technologies
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Colorado Engineering
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Broadcom
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Atmel
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Work Experience

Atmel
Product Engineer
Wed Oct 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Broadcom
Design Staff Engineer II
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Colorado Engineering
Senior Design Engineer
Wed Apr 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Agilent Technologies
Design Engineer
Fri Jul 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2009 00:00:00 GMT+0000 (Coordinated Universal Time)
Center For Secure And Dependable Systems
Undergraduate Researcher
Wed Jan 01 2003 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time)