Peter Chang

FAQ About Peter Chang

• What is Peter Chang's address?

  Peter Chang is located at
  San Jose, California, United States

• What is Peter Chang's job title?

  Peter Chang is a
  Experiences: NVIDIA / Prototype Design Engineer, San Jose, CA 2011 - current *Developed state-of-art prototype flow for FPGA emulation from synthesis to P&R including debugging flow. *Worked with EDA vendor resolved issues before integrated and released EDA tools into prototype flow. SemiconExperience / Consultant, San Jose, CA 2009 - 2010 *Worked on EDK related project on Xilinx Spartan3 board. Lattice Semiconductor / Application Engineer. San Jose, CA, 2006 - 2008 * Validated the functionality and tool flow for Lattice IP cores and reference designs. Uncovered major bugs in tool flow and design. Enhanced document not matched with design. * Analyzed and resolved design and tool issues effectively for key customers to their satisfaction. Obtained 90% satisfaction rate among major customers based on the survey data. * Accomplished goals by deadline and reported numerous bugs for major software release. Sun Microsystems / Design Engineer, Sunnyvale, CA, 1999 -- 2006 * Worked on design integration team focused on static timing analysis and developed static timing flow. * Solved a complex accuracy problem in Timing Library Format (TLF) libraries before project tapeout. * Developed methodology and tool flow for Realintent's Verix tool at Sun. * Deployed Verix tool flow to design teams after demonstrating its value by reporting numerous bugs in the early design phase of projects before quarterly deadlines. * Achieved 3X VCS simulation performance enhancement for Sun's UltraSparc project. Adaptec Inc. / Design Engineer, Milpitas, CA, 1997 - 1999 * Developed flow and methodology for Chrysalis Equivalent Check, HyperExtract and Simplex tools. * Deployed tool and methodology for Chrysalis Equivalent Checking to project teams by presenting evaluation results and demonstrating the value added features of the tool. * Enhanced HyperExtract flow and integrated the new features to the flow. Enhanced performance and accuracy by 20% Specialties: Skills: Designs: Logic design, VLSI design for ASIC, Sparc Microprocessor and FPGA. CAD tools: Synopsys DesignCompiler,VCS, Mentor Modelsim,RealIntent Verix, Novas Debussy/Verdi Languages: Perl, C, TCL, Shell Scripts, Verilog, VHDL Nvidia

• What industry does Peter Chang currently work in?

  Peter Chang currently works in the
  Nvidia

• What is Peter Chang's area of expertise?

  Peter Chang specializes in
  Experiences: NVIDIA / Prototype Design Engineer, San Jose, CA 2011 - current *Developed state-of-art prototype flow for FPGA emulation from synthesis to P&R including debugging flow. *Worked with EDA vendor resolved issues before integrated and released EDA tools into prototype flow. SemiconExperience / Consultant, San Jose, CA 2009 - 2010 *Worked on EDK related project on Xilinx Spartan3 board. Lattice Semiconductor / Application Engineer. San Jose, CA, 2006 - 2008 * Validated the functionality and tool flow for Lattice IP cores and reference designs. Uncovered major bugs in tool flow and design. Enhanced document not matched with design. * Analyzed and resolved design and tool issues effectively for key customers to their satisfaction. Obtained 90% satisfaction rate among major customers based on the survey data. * Accomplished goals by deadline and reported numerous bugs for major software release. Sun Microsystems / Design Engineer, Sunnyvale, CA, 1999 -- 2006 * Worked on design integration team focused on static timing analysis and developed static timing flow. * Solved a complex accuracy problem in Timing Library Format (TLF) libraries before project tapeout. * Developed methodology and tool flow for Realintent's Verix tool at Sun. * Deployed Verix tool flow to design teams after demonstrating its value by reporting numerous bugs in the early design phase of projects before quarterly deadlines. * Achieved 3X VCS simulation performance enhancement for Sun's UltraSparc project. Adaptec Inc. / Design Engineer, Milpitas, CA, 1997 - 1999 * Developed flow and methodology for Chrysalis Equivalent Check, HyperExtract and Simplex tools. * Deployed tool and methodology for Chrysalis Equivalent Checking to project teams by presenting evaluation results and demonstrating the value added features of the tool. * Enhanced HyperExtract flow and integrated the new features to the flow. Enhanced performance and accuracy by 20% Specialties: Skills: Designs: Logic design, VLSI design for ASIC, Sparc Microprocessor and FPGA. CAD tools: Synopsys DesignCompiler,VCS, Mentor Modelsim,RealIntent Verix, Novas Debussy/Verdi Languages: Perl, C, TCL, Shell Scripts, Verilog, VHDL

• Which languages does Peter Chang speak? 

  Peter Chang speaks the following languages:
  No languages available.

• Which industries has Peter Chang previously worked in?   

  Peter Chang has prior experience in the following industries:
  Semiconexperience , Lattice Semionductor , Sun Microsystems , Cadence Design Systems

• What is Peter Chang’s work experience?  

  Peter Chang has the following professional experience:
  Nvidia , Semiconexperience , Lattice Semionductor , Sun Microsystems , Cadence Design Systems .

• How can I find Peter Chang on LinkedIn?  

  You can view Peter Chang’s
  LinkedIn profile at LinkedIn URL.

• What are Peter Chang’s work email addresses?  

  Peter Chang’s work email addresses are
  [email protected] .

• What company does Peter Chang work for?  

  Peter Chang works at
  Nvidia