Pj Tan
Oversee Si development activities on AI and Data Center CPU from Design, Validation, DFT, Si Debug, Product/Test Engineering,... | San Francisco Bay Area, San Francisco Bay Area, United States
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Pj Tan’s Emails pj****@in****.com
Pj Tan’s Phone Numbers No phone number available.
Social Media
Pj Tan’s Location San Francisco Bay Area, San Francisco Bay Area, United States
Pj Tan’s Expertise Oversee Si development activities on AI and Data Center CPU from Design, Validation, DFT, Si Debug, Product/Test Engineering, Product Quality/Reliability to meet Product Qualifications Release to enable the ramp. Successfully Taped out and Bring-up > 20 CPUs, Multi-cores/Multi-threads SoC and ASICs. 5 Publications of Technical Papers and 1 patent.
Pj Tan’s Current Industry Intel
Pj
Tan’s Prior Industry
Sun Microsystems
|
Oracle
|
Intel
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Work Experience
Intel
Sr. Staff/Technical Lead In Ai And Data Center
Mon Feb 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Oracle
Principal Hardware Engineer
Mon Feb 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Sun Microsystems
Staff Engineer
Sun Sep 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Feb 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)Skills
Languages
Pj Tan Email Addresses
FAQ About Pj Tan
-
Pj Tan is located at
San Francisco Bay Area, San Francisco Bay Area, United States -
Pj Tan is a
Oversee Si development activities on AI and Data Center CPU from Design, Validation, DFT, Si Debug, Product/Test Engineering, Product Quality/Reliability to meet Product Qualifications Release to enable the ramp. Successfully Taped out and Bring-up > 20 CPUs, Multi-cores/Multi-threads SoC and ASICs. 5 Publications of Technical Papers and 1 patent. Intel -
Pj Tan currently works in the
Intel -
Pj Tan specializes in
Oversee Si development activities on AI and Data Center CPU from Design, Validation, DFT, Si Debug, Product/Test Engineering, Product Quality/Reliability to meet Product Qualifications Release to enable the ramp. Successfully Taped out and Bring-up > 20 CPUs, Multi-cores/Multi-threads SoC and ASICs. 5 Publications of Technical Papers and 1 patent. -
Pj Tan speaks the following languages:
No languages available. -
Pj Tan has prior experience in the following industries:
Oracle , Sun Microsystems -
Pj Tan has the following professional experience:
Intel , Oracle , Sun Microsystems . -
You can view Pj Tan’s
LinkedIn profile at LinkedIn URL. -
Pj Tan’s work email addresses are
[email protected] . -
Pj Tan works at
Intel
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