Prateek Garg

Prateek Garg

Electrical engineer specializing in CMOS devices with practical expertise in device physics, characterization and wafer level probing, semiconductor... | San Francisco, California, United States

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Work Experience

Apple

OLED Device Engineer

Thu Jun 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Apple

Device Engineer

Thu Nov 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jun 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Quality Reliability R&D Engineer

Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Nov 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Arizona State University

Graduate Research Assistant

Sun Dec 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri May 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)

Qualcomm

Engineer, Associate

Sun Jul 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Qualcomm

Technical Interim Intern

Sun May 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jul 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time)

Jawaharlal Nehru Centre For Advanced Scientific Research

Summer Research Fellow

Sat May 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jul 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)

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