Pravin Gavate

Pravin Gavate

Over 15+ years of experience in Pre Si Validation / Post Si Validation, FPGA Prototyping, Synopsys Zebu based... | Bengaluru, Bengaluru, India

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Work Experience

Intel

Soc Emulation Lead

Tue Dec 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Sevitech Systems

Technical Manager

Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Nov 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)

Aricent

Technical Lead

Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Nvidia

Senior Design Engineer

Fri Mar 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Sep 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)

Lsi

Senior Design Engineer

Sat Jan 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Mar 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)

Mindtree

Module Lead R/D Services

Fri Sep 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Dec 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)

Aftek

Hardware Design Engineer

Wed Mar 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)

Id Technology

Vlsi Design Engineer

Sun Feb 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Mar 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)

Intel

Soc Emulation Lead

— Present

Skills

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