
Rahul Ghosh
Experienced SerDes and protocol validation engineer with leadership skills to plan and drive silicon validation. Experience in project... | San Diego, California, United States
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Rahul Ghosh’s Emails ra****@go****.com
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Rahul Ghosh’s Location San Diego, California, United States
Rahul Ghosh’s Expertise Experienced SerDes and protocol validation engineer with leadership skills to plan and drive silicon validation. Experience in project management processes starting from developing test scopes, planning, scheduling to resource management and during execution phase communicating test results and risks to all stake holders and PMs. Technical expertise in PLL, DLL, Transmitter and Receiver high speed characterization in a broad range of industry standards including IEEE 802.3ck, PCIe Gen4/3/2/1, USB, MIPI, DP, DSI, SAS 12G and SATA. In depth knowledge of SerDes architecture including TX Equalization, CDR, RX DFE, CTLE, PLL, Phy and Link layer protocol, experience with FPGA integration of Phy and Link Layer in Synopsys Synplify, SAS/SATA Protocol Link up validation and debug using Synopsys Identify with Xilinx FPGA and SerDes. Customer support experience as an Application engineer and experience with Signal Integrity analysis and IBIS AMI model simulation in industry standard tools including Agilent ADS, Mentor Graphics Hyperlynx and SiSoft QCD. Currently pursuing MBA from Gies College of Business , UIUC after completing project management certification from Penn State.
Rahul Ghosh’s Current Industry Google
Rahul
Ghosh’s Prior Industry
Lsi
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Lsi An Avago Technologies
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Broadcom
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Qualcomm
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Google
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Work Experience

Hardware Engineer
Fri Jul 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Qualcomm
Sr Staff Engineer
Wed Apr 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)
Broadcom
Principal Engineer
Tue Apr 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Mar 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Lsi An Avago Technologies
Staff Applications Engineer
Sun Apr 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Mar 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Lsi
Sr Hardware Validation Engineer
Thu Nov 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Mar 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)
Lsi
Mixed Signal Test Engineer
Fri Apr 01 2005 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Nov 01 2007 00:00:00 GMT+0000 (Coordinated Universal Time)