
Ranjith Maddi
Digital Design, Micro-Architecture, RTL coding/Integration, Simulation, Timing closures FPGA design. Experience of working on many industry standard protocols and... | Hyderabad, Hyderabad, India
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Ranjith Maddi’s Emails ra****@am****.com
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Ranjith Maddi’s Location Hyderabad, Hyderabad, India
Ranjith Maddi’s Expertise Digital Design, Micro-Architecture, RTL coding/Integration, Simulation, Timing closures FPGA design. Experience of working on many industry standard protocols and interfaces like SPI, I2C, knowledge on UART, AXI, Pcie. Complete design cycle for FPGA based systems including RTL coding/Integration, Verification and Synthesis and STA. Worked on Xilinx FPGAs, having basic knowledge of device architectures. Having knowledge on CDC design technique for FPGA design. Expertise in developing Designs with Verilog and good in VHDL programming. Have sound knowledge in FPGA/ASIC Design Flow. Worked with various tools – Xilinx ISE and VIVADO, ModelSim and QuestaSim. Worked on Xilinx Chip scope analyzer and ILA analyzer. Sportive team player, motivates the team members to excellence, understands the value and importance of delegating work and responsibilities. Strong communication, analytical, debugging and presentation skills.
Ranjith Maddi’s Current Industry Amd
Ranjith
Maddi’s Prior Industry
Trylogic Soft Solutions Ap
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Einfochips
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Mobiveil
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Amd
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Work Experience

Amd
Sr Design Application Engineer
Sat Aug 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Mobiveil
Engineer
Fri Jun 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jul 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Einfochips
RTL Design Engineer
Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Trylogic Soft Solutions Ap
VLSI designer
Mon Dec 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)