
Terrence Tanis
Hardware and IC designer with 27+ years of experience in digital and mixed signal systems for wireless and...
Chicago, Illinois, United States
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Terrence Tanis’s Emails [email protected]
Terrence Tanis’s Phone Numbers 1312559****
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Terrence Tanis’s Location Chicago, Illinois, United States
Terrence Tanis’s Expertise Hardware and IC designer with 27+ years of experience in digital and mixed signal systems for wireless and wireline telecommunications equipment. Strong technical leader with a diverse background designing and supporting various levels of system hardware, from small battery-powered handheld wireless transceivers to rack-mounted shelves and hardware modules (blades). Extensive experience as architect and technical team leader for over a dozen custom ICs (FPGAs/CPLDs and ASICs). Current job focus is in architecting and proposing FPGA and hardware-accelerated solutions for Government customers. - Technical lead/hardware designer for twelve plug-in blades. Designed several hardware modules with multi-gigabit signaling rates. - FPGA/CPLD selection, RTL design, embedded SERDES implementation, and validation. Formulated design specifications, wrote VHDL, and tested ten moderate to high-complexity designs. - Implemented multi-gigabit (up to 25Gbps) backplane designs. - Expert-level familiarity implementing low-cost, high-performance clock distribution schemes: proper oscillator selection, PLL design, low-jitter fanout. Summary of key skills: - Hardware product development from product definition and requirements, through design and validation, to manufacturing and customer support. - Product lifecycle/sustaining engineering for cost reduction and component end-of-life management. - Plug-in module, backplane, and FPGA/CPLD design and support. Comprehensive knowledge of Xilinx, Altera, and Actel devices and software. VHDL, exposure to Verilog/System Verilog. - High-speed digital design with multi-gigabit SERDES. Crosstalk and high-speed simulation, SERDES tuning, and TDR analysis. - Mixed analog/digital PLL design, modeling, and characterization. Unique knowledge of crystal oscillators. - PCB stackup design. - Design for manufacturability/test. - Managing BOM cost targets for both high and low volume products. - Schematic/PCB layout with Mentor Graphics Expedition, including DxDesigner, Expedition, Hyperlynx, and CES. Exposure to Cadence Allegro and OrCad. - Exceptional prototype and support debugging skills. - Strong knowledge of key telco/synchronization standards: SONET/SDH, gigabit Ethernet, IEEE 1588, and SyncE.
Terrence Tanis’s Current Industry Motorola Solutions
Terrence
Tanis’s Prior Industry
Tellabs
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Motorola Solutions
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Work Experience

Motorola Solutions
Distinguished Member of Technical Staff
Thu Jun 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Motorola Solutions
Principal Staff Engineer
Tue Oct 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jul 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Tellabs
Staff Engineer
Mon Feb 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Oct 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Tellabs
Staff Engineer (various positions of increasing technical responsibility including)
Tue Aug 01 1995 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Feb 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)