
Wen-Yang Hsu
No headline available | San Jose, California, United States
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Wen-Yang Hsu’s Emails we****@ep****.ch
Wen-Yang Hsu’s Phone Numbers No phone number available.
Social Media
Wen-Yang Hsu’s Location San Jose, California, United States
Wen-Yang Hsu’s Expertise Analog / Mixed-Signal IC Design
Wen-Yang Hsu’s Current Industry Infinera
Wen-Yang
Hsu’s Prior Industry
Tsmc
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Amd
|
Epfl
|
Biopro Scientific
|
Mediatek
|
Imec
|
Infinera
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Work Experience

Infinera
Staff Mixed-Signal Circuit Design Engineer
Sun Jan 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Imec
Researcher (Senior Analog Design Engineer)
Fri Jan 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Jan 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Mediatek
Technical Manager
Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Nov 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time)
Biopro Scientific
Deputy Manager
Mon Oct 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Epfl
Doctoral Student
Mon Dec 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Amd
Contractor
Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Nov 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Tsmc
Engineer
Thu Sep 01 2011 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Nov 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)