
Yagang Li
• A highly experienced engineer with 15+ years’ combined experience in consumer electronics (Apple & Microsoft), semiconductor & optoelectronic... | Cupertino, California, United States
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Yagang Li’s Emails ya****@ap****.com
Yagang Li’s Phone Numbers No phone number available.
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Yagang Li’s Location Cupertino, California, United States
Yagang Li’s Expertise • A highly experienced engineer with 15+ years’ combined experience in consumer electronics (Apple & Microsoft), semiconductor & optoelectronic devices (JDS Uniphase), thin-film solar cells/modules (First Solar), materials science (Oxford University). • Offering hands-on expertise in reliability risk assessments, FMEA, failure analysis, process/product development, device/component characterization. • Proven strength in design/development of reliability evaluation, accelerated life tests, reliability assurance plan, reliability lifetime prediction. • Valuable experience in component vendor selection and drive component qualification activities, Interface with overseas manufacturing partners and develop a strategy for product qualification. • Extensive experience in statistical analysis and reliability modeling, Design of Experiments (DOE), Statistical Process Control (SPC), i.e. JMP, Weibull++, ALTA
Yagang Li’s Current Industry Apple
Yagang
Li’s Prior Industry
University Of Oxford
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Sdl
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Jds Uniphase
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First Solar
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Microsoft
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Apple
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Work Experience

Apple
Sr Hardware Reliability Engineer
Fri Sep 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Microsoft
Senior Hardware Reliability and Quality Engineer
Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Aug 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time)
First Solar
Manager, Reliability Physics
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
First Solar
Senior Reliability Physics Engineer
Sun Aug 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Jds Uniphase
Sr. Reliability Engineer
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Jan 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Sdl
R&D Development Engineer
Sat Jan 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
University Of Oxford
Research Fellow
Wed Jan 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jan 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)