
Nataraj Srinivasaih
Extensive industry experience, successfully working with hardware teams, Tool and IP vendors and verify multi-million gate low power... | Bengaluru, Bengaluru, India
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Nataraj Srinivasaih’s Emails na****@al****.com
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Nataraj Srinivasaih’s Location Bengaluru, Bengaluru, India
Nataraj Srinivasaih’s Expertise Extensive industry experience, successfully working with hardware teams, Tool and IP vendors and verify multi-million gate low power SoC chips for storage and networking adapters. • Core Competencies - Effectively execute verification at various levels like Block level, Sub System level, System level on pre-silicon and post silicon, developing environments for verification, debugging, scheduling and tracking verification activities, recruiting, managing and training team. Work with the designers both in India and US. Served as Company director and managed in setting up and build the branch in India. • Expertise – ASIC Verification, IP Integration, FPGA, DFT verification, Gate Level debugging and verifying both pre-silicon and post silicon, Scripts developed for Regressions flow. Various tools like VCS, CVS, Mercurial, Bugzilla, Testopia. Various languages like C, C++, PLI, Verilog, SystemVerilog, Perl, VERA. • Technologies –SoC Designs (Tensilica, MIPS, DSP), SMBus, NCSI, JTAG, UART, FLASH, EPROM, PCIe, MAC, Various networking protocols, tool development.
Nataraj Srinivasaih’s Current Industry Acl Digital
Nataraj
Srinivasaih’s Prior Industry
Duet Technologies
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Zaiq Technologies
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Silverback Systems
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Chelsio Communications
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Realsilicon
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SCS
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Acl Digital
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Work Experience

Acl Digital
Senior Director Of Engineering
Fri Oct 01 2021 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Acl Digital
Director Of Engineering
Tue Sep 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
SCS
Consultant
Thu Feb 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Realsilicon
VP Engineering (Front End)
Tue Mar 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Apr 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Chelsio Communications
Hardware verification Manager and Company Director
Wed Sep 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Chelsio Communications
Verification engineer
Fri Sep 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Feb 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Chelsio Communications
MTS
Wed Sep 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2006 00:00:00 GMT+0000 (Coordinated Universal Time)
Silverback Systems
Member of Technical Staff
Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Aug 01 2004 00:00:00 GMT+0000 (Coordinated Universal Time)
Zaiq Technologies
Consultant
Mon Jan 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jan 01 2002 00:00:00 GMT+0000 (Coordinated Universal Time)
Duet Technologies
Senior Member of Techical Staff
Mon Sep 01 1997 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2001 00:00:00 GMT+0000 (Coordinated Universal Time)